Loads, for example, a lamp and a motor that are mounted on a vehicle are connected with a power source (battery) through semiconductor switches. More specifically, load circuits in which the semiconductor switches and the loads are connected in series are connected as a plurality of loops to the power source which is mounted on the vehicle, and the drive and stop of the individual loads are controlled by ON/OFF-manipulating the semiconductor switches which are disposed in the individual load circuits.
Besides, a protective device is disposed in order that, in a case where an over-current ascribable to a short-circuit fault such as a dead short-circuit has flowed in any of the individual load circuits, the load circuit may be protected by turning OFF the semiconductor switch as soon as possible. As prior-art examples of such a protective device for the load circuit, there have been known ones stated in, for example, Japanese JP-A-2006-24997 (Patent Document 1) and Japanese JP-A-2007-85861 (Patent Document 2).
FIG. 4 is a circuit diagram showing the configuration of the protective device for the load circuit as is stated in Patent Document 1. In the circuit shown in FIG. 4, there is illustrated an example in which two loops of load circuits (first load circuit “A” and second load circuit “B”) are connected in parallel to a power source VB. More specifically, the first load circuit “A” which includes a series connection consisting of a MOSFET (T101; semiconductor switch) and a load 111 (a lamp, a motor, or the like), and the second load circuit “B” which includes a series connection consisting of a MOSFET (T101-1) and a load 111-1 are connected to the power source VB. Incidentally, since the first load circuit “A” and the second load circuit “B” are identical in configuration, only the first load circuit “A” will be described below, and the second load circuit “B” shall be omitted from description by assigning a suffix “−1” thereto.
In the circuit shown in FIG. 4, a point P1 that corresponds to the drain of the MOSFET (T101) is connected to an E1 detection circuit 112. The E1 detection circuit 112 is disposed in common for the load circuits “A” and “B”. It detects a counter-electromotive force E1 which is generated in the wiring line (resistance Rw1 and inductance L1) between the point P1 and the plus terminal of the power source PB, and it outputs the detection signal of an H level to one input terminal of an AND circuit AND102 in a case where the counter-electromotive force E1 has reached a predetermined level.
Both the ends of the MOSFET (T101) are connected to a VDS detection circuit 113. This VDS detection circuit 113 measures the terminal voltage of the MOSFET (T101), and it outputs the detection signal of the H level to the other input terminal of the AND circuit AND102 in a case where the terminal voltage has reached a predetermined value.
In addition, when a switch SW101 which is interposed between the power source VB and a resistance R106 is turned ON, a drive command is input to a driver 114 through an AND circuit AND101, and upon receiving the drive command, the driver 114 outputs the drive signal of the H level to the gate of the MOSFET (T101). Thus, the MOSFET (T101) is turned ON, and the load 111 is driven.
Besides, in a case where a short-circuit fault such as a dead short-circuit has occurred in any place of the load circuit “A”, an excess counter-electromotive force E1 is generated, and the terminal voltage of the MOSFET (T101) exceeds the predetermined value. Therefore, the output signal of the AND circuit AND102 becomes the H level, and the H level signal is fed to a latch DF101. As a result, the output of the AND circuit AND101 is brought to an L level, and a MOSFET (T103) is turned ON, whereby the gate of the MOSFET (T101) is grounded to cut off the load circuit “A”. That is, the load circuit “A” in which the short-circuit fault has occurred is cut off, and the circuit is protected.
On this occasion, in the load circuit “B”, the drive state thereof can be maintained irrespective of the cutoff of the load circuit “A”. That is, in the circuit shown in FIG. 4, among the plurality of loops of load circuits, only the load circuit having undergone the short-circuit fault is cut off, and any other load circuit can be operated as usual.